That’s where D1X, Intel’s largest operational fabrication plant, is based

The amazing thing about D1X isn’t the way Intel makes ever more diminutive processors, though. It’s what they’re made of.D1X is where processors measuring just 14 millionths of a millimetre across are made, ready to be shipped to motherboard and PC manufacturers all over the world.

That’s where D1X, Intel’s largest operational fabrication plant, is based – and it’s where what would have once seemed like a miracle of engineering is performed all day every day.Strange things happen in forests – especially Silicon Forest, as Hillsboro in Oregon has come to be known.

The whole business is built on sand.

There are more than 300 steps to turn sand into silicon, but you can group them into 10 key areas. If you can’t imagine how the stuff you make sandcastles with can become a Kaby Lake processor, prepare to be amazed…

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Step one: Get some sand

As you’ve probably guessed, chipmakers don’t head for the nearest beach with JCBs or place bulk orders with the local builders’ merchant. Normal sand and the sand used in the building industry is usually coloured red, yellow or orange due to the presence of impurities. What chipmakers need is silica sand, which you usually get from quarrying.

Silica sand is also known as silicon dioxide, and as you’ve no doubt guessed from the name it’s a compound of silicon and oxygen. To get the silicon, the oxygen is removed by mixing it with carbon and heating it in an electric arc furnace to temperatures beyond 2,000 degrees C. At those temperatures the carbon reacts with the oxygen, becoming carbon dioxide and leaving pure silicon in the bottom of the furnace. That silicon is then treated with oxygen to remove impurities such as calcium or aluminium, leaving what’s known as metallurgical grade silicon. That’s up to 99% pure.

Unfortunately for the chipmakers, that still isn’t pure enough to meet the requirements of microscopic microprocessors. So the metallurgical grade silicon is refined further, this time by grinding it into a fine powder, adding hydrogen chloride and heating it in a fluidised bed reactor at 300 degrees C. This creates a liquid silicon compound called tricholrosilane, and it also creates chlorides of unwanted elements such as iron, aluminium, boron and phosphorus. These are removed by fractional distillation and the trichlorosilane is vaporised in hydrogen at 1,000 degrees C. An electrically heated, ultra-pure silicon rod collects the silicon, and the result is electronic-grade silicon. Its purity: 99.999999%.

It turns out that this was the easy bit.

Step 2: Make some crystals

Electronic-grade silicon still isn’t perfect, because it has a polycrystalline structure. That means it’s composed of lots of small silicon crystals, and the joins between those crystals can suffer from defects known as grain boundaries. Those boundaries can cause chaos with electronic signals, so the structure of the silicon has to be changed.

The process of doing that is called the Czochralski Process, and it involves melting the silicon crystal in a quartz crucible at just over the melting point of 1,414 degrees C. A tiny silicon crystal is then dipped into the molten silicon, and it’s drawn out while rotating constantly in the opposite direction to the rotation of the crucible. This attracts silicon from the crucible, creating what’s known as a boule. A boule is a rod made from a single silicon crystal, and its size depends on the temperature, the rate of spin and the rate at which the crystal is pulled from the liquid. A typical boule will be around 300mm across.

Step 3: Cut your wafers

The circular silicon rod is now cut into wafers, and those wafers are cut as thin as possible without making them incapable of surviving the fabrication process. The rod is cut with a device that works rather like an egg slicer, cutting multiple slices simultaneously to create wafers 0.775mm thick. The wire constantly moves and carries a slurry of silicon carbide, the same abrasive material that’s used to make wet and dry sandpaper. The sharp edges of the wafers are then smoothed to prevent them from chipping.

Next up: lapping, where the wafers’ surfaces are polished using an abrasive slurry until the wafers are flat to a tolerance of two thousandths of a millimetre. After that, the wafer is etched with a mixture of nitric, hydrofluoric and acetic acids to create an even smoother surface.

Step 4: Make patterns

The super-smooth wafers will now be given an oxide layer, which is used to create the required features of the circuit. This is done selectively to specific areas, and may involve the use of ion beams, hot gases and/or chemicals.

Once such chemical is known as “photoresist”, and it’s broadly similar to the chemicals used to make photographic film. Unfortunately that doesn’t cope very well with hot gas treatments, so the wafer needs to be masked. This is done by applying a patterned oxide layer that ensures the gases don’t reach the photoresisted bits that the chip designer wants to keep.

There can be up to six steps in this process:

  • The wafer is heated to a high temperature in a furnace, creating a layer of silicon dioxide as the silicon reacts with oxygen
  • A layer of photoresist is applied, with the wafer spun in a vacuum to ensure even coverage and then baked dry
  • The wafer is exposed to UV light through a photographic mask or film, once for each chip or cluster of chips on the wafer. The wafer is moved between each exposure using a machine called a ‘stepper’
  • An alkaline solution is applied, dissolving the sections of photoresist that were exposed to the UV light. Those sections are washed away
  • Hydroflouric acid is used to dissolve the parts of the oxide layer where the photoresist has been washed away
  • A solvent is applied to remove the remaining photoresist, leaving a patterned oxide layer in the shape of the required circuit features

Step 5: Make some MOSFETS

The fundamental building block of a processor is a transistor called a MOSFET, which is short for Metal Oxide Semiconductor Field Effect Transistor (although the M bit is often out of date: what was previously metal is often polycrystalline silicon).

A MOSFET is essentially a switch that is either on or off, and to make it you need to create two different regions known as p-type and n-type regions. To do that, the wafer is blasted with a beam of boron ions, positively charged boron atoms that become embedded in the silicon. The photoresist layer blocks the beams to ensure that the ions only go where they’re supposed to, creating what’s known as p-wells.

A second photoresist pattern is now applied, and the beam changes to phosphorous ions. These create n-wells. A more powerful phosphorous beam is then applied to create the regions that will act as the source and drain of the switches, and a pattern oxide layer is deposited before a layer of silicon-germanium doped with boron is applied. With the MOSFETs created, the next step is to make the gates that control their voltage.

Step 6: Get the gates

A gate is an electrode that sits between the switch’s source and drain, insulated by a very thin layer of metal oxide. The most recent Intel processors use second-generation Tri-gate transistors, which as the name suggests uses three-dimensional gates instead of the traditional two, and they employ a variation on MOSFETs known as FinFET or multi-gate architectures. These improvements enable Intel to drop the size of its architecture from 90nm to 22nm and even 14nm while increasing performance and efficiency.

To create a gate, a thin layer of silicon dioxide is deposited using a process called Chemical Vapour Deposition, or CVD for short. This takes place in a furnace filled with gases that cause a chemical reaction on the surface of the silicon. CVD is used again to apply a layer of silicon, this time by reacting silicon hydride gas with oxygen to produce silicon and water.

Step 7: Connect with copper

Once the gates have been created, the wafer will contain billions of MOSFETs or FinFETs, ready to be carved up into individual chips containing millions of switches. But first, the switches and gates need to be connected. That’s achieved by putting down a layer of silicon oxide insulation, to ensure that the interconnecting tracks don’t short out all of the switches. Once that has been applied, it’s time to add the copper. One method of doing that is called the ‘double Damascene’, and it involves creating tungsten connecting pins and copper interconnects.

First of all, hydrofluoric acid is used to etch holes in the insulation, guided by a layer of photoresist. Then the trenches for the interconnection tracks are etched, again through a layer of photoresist. A top layer of copper is applied by electroplating, which fills the trenches and holes to make contact with the underlying switches and which creates metallic pins protruding through the insulating layer. These are known as vias. Finally, the wafer is polished to remove the excess copper, leaving only the desired tracks in the trenches and holes.

Step 8: Complete the circuit

You can’t always wire up a circuit without having some wires crossing, and that’s disastrous for CPUs: one rogue interconnection could make any tracks that cross it short out. To avoid this, MOSFETs have multiple metallic layers, each insulated by a layer of silicon dioxide and connected with vias.

Step 9: Throw out the bad ones

As you can probably imagine, such an incredibly complex process is prone to all kinds of potential problems, so while each wafer will contain a few hundred ‘dies’ – the official name for chips – many of the dies will have, er, died.

A typical yield from a wafer is around 60%, although the numbers depend on the process used – whenever a manufacturer moves to a new, more compact architecture, yields inevitably fall until production teething problems have been identified and addressed. A device called a wafer probe tests the dies, the wafer is sawn up into individual chips and the non-working ones are discarded. Slightly faulty dies may be reused as lower specification products.

Step 10: Add bubble wrap

The die may be a completed processor, but it’s far too fragile to ship in its current state. That’s why the manufacturer then puts the bare chip in the package that we tend to visualise when we think of a processor. The die’s contacts are connected to the package’s contacts, and it’s ready to ship and to stick into a motherboard. All that’s left is some final quality assurance and the processor can begin its journey to the heart of your PC.

As a final note, fancy watching some video footage of how chips are made? The following clip is from a few years back, but it’s certainly an interesting visual illustration of how Intel produces chips with 3D transistors.

Image Credit: All images used in this article are from Wikimedia

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